VLSI SMDP-II SPONSORED PROJECT
Department of Electronics &Communication Engineering, NIT Hamirpur jointly with Dept. of CSE has received an all India Project on Special Manpower Development Programme for VLSI Design & related software (SMDP-II) for a period of five (5) years w.e.f. 2006 from the Ministry of Communication and Information Technology, Department of Information Technology, Govt. of India, New Delhi. It is an important and prestigious project through which quality manpower in the area of VLSI Design and related softwares is planned to be created, to cater to the pressing demand of VLSI Engineers and Designers in the country. The project has been extended till March, 2012.
Primary Objective - To train special manpower in the area of VLSI Design and related software at M.E./M.Tech level (Type-II manpower). In addition to this, generation of Type-III manpower i.e. M.E./M.Tech in other areas of electronics etc. with at least two courses on VLSI design will also be undertaken.
Secondary Objective - To train Type-IV manpower i.e. B.E./B.Tech in electronics etc. with graduate level courses on VLSI Design. However, the programme will not only be limited to generation of Type-II, III & IV manpower but would endeavour to generate Ph.D in various aspects of VLSI design/microelectronics (Type-I manpower) manpower as well. The establishment of VLSI design laboratories at RCs would also strengthen their academic programme.
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Establishing the VLSI Design laboratories in all PIs and RC's with the Electronic Design Automation environment drawn by the Working Group. CEERI Pilani would act as the nodal agency for the centralized procurement of all hardware and EDA tools that would be provided to each of the RC and PI in order to get pricing advantage as well as maintaining a uniform standard throughout the country. In addition to the EDA tool environment being provided to all RC's and PIs, RC's would be provided with miscellaneous capital equipment required by the respective institution to take care of its testing and other needs and PIs. The misc. capital equipment procurement would be done by the respective RC's.
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Training of laboratory engineers and technicians. Hands-on training would be provided on the hardware & EDA tools.
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Conducting Instruction Enhancement Programme (IEP) for training of the faculty of 25 PIs by seven Resource Centres. To start with, seven IEP topics would be selected from the list drawn up by the Working Group (Annexure-III). 25 IEP's would be conducted during the entire project duration by 7 RC's. In addition to these, 5 EDA tool administration IEP would be conducted by CEERI Pilani.
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Generation of Manpower in VLSI design and related software at: B.E/B.Tech level (Type IV manpower) - M.E/M.Tech level in the areas of Electronics, Communications, Computer Science, Instrumentation etc. (Type III manpower) - M.E/M.Tech in VLSI design & Microelectronics (Type II manpower) The Working Group has developed a model curriculum/syllabus, which all the participating institutions would be encouraged to follow. - PhD in various aspects of VLSI design and related software (Type I manpower).
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All the participating institutions would be provided with salary grant for 2 temporary faculties during the project period. The RC's would be provided with salary grant for research/project staff. Both RC's and PI's would also be provided with salary grant for a lab engineer. In addition to this, CEERI Pilani would be provided with salary grant for 2 project assistants to monitor lab infrastructure at all the RC's and PI's.
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International Guest Faculty: To invite distinguished international guest faculty e.g. from IEEE Circuits & Systems Society (CAS) under its Distinguished Lecture Program (DLP), and others including eminent NRI's to conduct short-term courses at RC's in selected areas of VLSI design.
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The Project Implementation Unit at DIT would act as a national repository, facilitation and demonstration center for all EDA tools and designs done at RC's and PI's.
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India Chip Programme: Selected VLSI circuit designed at various RC's and PIs would be siliconised either at Semiconductor Complex Ltd. Mohali or through International mechanisms like MOSIS, CMP, EURO Practice etc.
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National VLSI Website & Mirror Site: A website at a national center which would be mirrored at all RC's would be created. RCs would provide contents for the National VLSI website. This would house all latest and updated tools including public domain tools, courses and reference designs, which may be developed at any of the RC's and PI's. All the RC's & PI's would be able to download resources from these sites as and when required. CEERI Pilani would host and support a web site especially for EDA tool and hardware configuration/administration and other issues.
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In order to encourage the element of research, faculty of PIs as well as students would be provided with financial support to attend national conferences in the area of VLSI design/microelectronic. Students and faculty of RC's and PI's would be supported to attend IEEE conference anywhere in the area of VLSI design provided the students/faculty has an accepted paper for oral lecture presentation.
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Book grants and grant for furniture for the VLSI design laboratory would also be provided to all RC's and PIs.
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Annual RC/PI Workshop would be organized both at regional and national level in which apart from the overall project review, awards would be provided to best M.Tech projects. ZOPP workshop(s).
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Involving coordinators from all RC's, PI's and representative from PIU/DIT would also be organized.
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LIST OF 7 RCs AND 25 PIs FOR SMDP-II |
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NIT
Surat
Dr. (Mrs.) Rajeevan Chandel, Associate Prof. and Coordinator SMDP-II
Dr. Lalit K. Awasthi, Prof. and Co-coordinator SMDP-II
Dr. (Mrs.) Kamlesh Dutta, Associate Prof. & Head CSE and Faculty-in-Charge
Er. (Mrs.) Gargi Khanna, Assistant Prof. E&CED
Dr. Ashwani Kumar Rana, Assistant Prof. E&CED
Er. Gagnesh Kumar, Assistant Prof. and Faculty-in-Charge ECE
Er. Philemon Daniel, Assistant Prof. E&CED
Er. Himanshu Sharma,VLSI Faculty (under SMDP-II)
Er. Rohit Dhiman, VLSI Faculty (under SMDP-II)
LAB STAFF IN VLSI AT NIT HAMIRPUR (HP)
Er Lalit Mohan, Lab. Engineer (under SMDP-II)
Er. Shiv Dyal, Lab. Technician E&CED
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Type of Manpower |
Description and assumption used for calculating numbers/ year |
2006-07 |
2007-08 |
2008-09 |
2009-10 |
2010-11 |
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Qualified (by the end of academic year 2006-07) |
Qualified (by the end of academic year 2007-08) |
Qualified (by the end of academic year 2008-09) |
Qualified (by the end of academic year 2009-10) |
Enrolled (in the beginning of academic year 2010-11) |
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Type-I |
PhD in various aspects of VLSI Design & CAD |
01 (In Progress) |
03 (In Progress) |
04 |
- |
05 (in progress)
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Type-II |
M.E./M.Tech in VLSI Design & CAD |
18 (1st yr) |
17 |
15 |
16 |
18 |
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Type-III |
M.E./ M.Tech in other areas of Electronics/ Communication/ Computer Science/ Instrumentation etc., who have taken at least two courses on various aspects of VLSI Design and CAD |
NIL |
NIL |
18 CSE |
16 CSE |
19 Communication 14 CSE 11 Mobile Computing |
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Type -IV |
B.E./B.Tech in Computer Science |
30 CSE |
32 |
42 |
61 |
91 |
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B.E./B.Tech in Electronics & Communication/ Instrumentation, etc |
46 ECE
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60 |
60 |
60 |
81 |
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M.S. Specialization in Circuit Design / Microelectronics |
- |
- |
- |
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- |
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Total (Type-IV) |
76 |
92 |
102 |
121 |
172 |
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Total (Type-I, Type-II, Type-III, Type-IV) |
95 |
112 |
139 |
153 |
239 |
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Sr.No. |
Name |
Designation |
Salary (Rs.)pm |
Duration |
Period |
Qualification |
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1. |
Mr. Pankaj Kamboj |
Lab Engineer |
10,000 |
2 year |
From 3rd Oct 06- Mar 2008 |
B.Tech. |
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2. |
Mr. Gurvinder Singh |
Lab Engineer |
10,000 |
2 year |
From 27th Sept. 06 till May 2008 |
B.Tech. |
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3. |
Er. Himanshu |
Lab Engineer |
10,000 |
1 year |
From 2nd July 08 till July2009 |
M.Tech. |
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4. |
Er. Lalit Mohan |
Lab Engineer |
10,000 12,000 15,000 |
2 and half year |
2nd July 2008 till 31-12-2010 w.e.f. Dec 2009 wef Aug 2010 onwards |
B.Tech. |
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5. |
Er. Surender Kumar |
Lab Engineer |
7,000 |
6 months |
Sept. 2010 onwards |
Dip. in ECE Pursuing AMIE |
2. Guest/Temporary Faculty
| S.No. |
Name of Guest Faculty |
Duration |
Period |
Topic Allotted |
Enumeration Paid (Rs.) pm |
| 1. |
Er. Philemon Daniel |
2 year |
From 28/11/2006 till 31-12-2009 |
VLSI Testing VLSI Algorithms Embedded Systems |
20,000 |
| 2. |
Er. Parminder Singh |
1 year |
From 5/5/2007 till 8 Jan 2009 |
Analog VLSI Design ASIC Design |
20,000 |
| 3. |
Er. Himanshu |
1year |
From July 2009 July 2010 onwards |
Microwave RF Design Basic Electronics VLSI Lab |
20,000 24,000 |
| 4. |
Er. Rohit Dhiman |
6 months |
July 2010 onwards |
Analog Electronics MEMS & Microsensors Basic Electronics VLSI Lab |
24,000 |
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1. |
1. Chip Design (Details of the chip fabricated using SMDP Fund) |
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1. |
Name of Chip Design |
Adder circuits |
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2. |
Number of students involved in project |
M.Tech. VLSI Design students |
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3. |
Technical Specification including I/O PIN detail/packages/complexities/ power consumption etc.) |
Designed |
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4. |
Technology used |
0.18μm |
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5. |
Name of the Design Integrating Institution |
IIT Delhi |
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6. |
Brief Description of functionality |
Adder circuits using different design styles |
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7. |
Name of the foundry where chip has been fabricated |
UMC |
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8. |
Scanned picture of Chip/Die |
Under design process |
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2. |
Board Level Design (Details of the chip fabricated using SMDP Fund) |
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S.No. |
Implementation and optimization of face recognition algorithm using Gabor Wavelets |
Name of Design |
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1. |
3 No |
Number of students involved in project |
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2. |
Variation in orientation, specs, illumination, hair were considered. MATLAB(R2007a), Accel DSP9.2, Xilinx System Generator 8.2, Xilinx ISE 8.2i were the Tools used |
Design Specifications |
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3. |
Compared the results obtained by few standard wavelets used for pattern recognition in the face recognition algorithm. It was verified in MATLAB, then converted to VHDL code using Accel DSP9.2of Xilinx and then implementation of FPGA |
Brief Description of functionality |
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4. |
SPARTAN-3E FPGA board |
Name of the H/W Board used |
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- VLSI Manpower generation at all levels
- Manpower generated is well recognized by industry & academia
- Exposure to complete chip design
- PG course in VLSI
- Various Industry standard EDA Tools available
- Research work has enhanced
- Generation of PhDs in VLSI
- Support for attending international & national conferences
- Faculty and students have the opportunity to attend various IEPs and Vendor Tool Trainings
- Interaction between various institutes of Repute
- Various Resources available at SMDP-II Website: http:// www.smdp2.gov.in
- B.Tech Projects in VLSI being carried out
- B.Tech Placements in core VLSI organizations.
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S.No. |
SHORT TERM COURSES / CONFERENCES |
Name of Faculty Coordinators |
Dates |
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1.
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Summer School cum Training Programme on VLSI Design & Optimization Techniques (VDOT 2006) (TEQIP) E&CED, NIT Hamirpur HP |
Dr. Rajeevan Chandel & Dr. Ashwani Kumar Chandel
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05-09 June, 2006 |
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2. |
Winter School cum Training Programme on VLSI Design & Recent Trends in Nano-Electronics (VDNE 2006) (TEQIP) |
Dr. Rajeevan Chandel & Er. Ashwani Kumar Rana
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18-22 December, 2006 |
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3. |
NATIONAL CONFERENCE on Design Techniques for modern electronic devices, VLSI & Communication systems DTVC-2007 (Under TEQIP, VSI, SMDP-II) E&CED, NIT Hamirpur HP |
Dr. Rajeevan Chandel General Chair
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14-15 May, 2007 |
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4. |
Short Term Course cum Training Programme on HDL & VLSI EDA Tools |
Dr. Rajeevan Chandel & Er. Philemon Daniel
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21-25 May, 2007 |
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5. |
STTP on VLSI Design & Tools under NIT Hamirpur Seminar & SMDP-II Project VLSI-07 E&CED, NIT Hamirpur HP |
Dr. Rajeevan Chandel & Er. Philemon Daniel
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4-8 Dec, 2007 |
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6. |
National Workshop on VLSI & Communication Systems VCS-08 E&CED, NIT Hamirpur HP
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Dr. Rajeevan Chandel, Er. Gargi Khanna & Er. Krishan Kumar
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5-6 June, 2008 |
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7. |
AICTE Summer School (2-weeks) on Applications of MATLAB, OrCAD/ SPICE in Engineering MOS-08 EED & E&CED, NIT Hamirpur HP |
Dr. Ashwani Kumar Chandel & Dr. Rajeevan Chandel
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30 June- 11 July, 2008 |
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8. |
AICTE Summer School (2-weeks) on Design Techniques for VLSI & Nanotechnology DTV-08 E&CED, NIT Hamirpur HP |
Dr. Rajeevan Chandel Er.Ashwani kumar
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12-21 July, 2008 |
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9. |
STTP Fundamentals of HDL Verilog & SPICE, SMDP-II & SPEC E&CED, NIT Hamirpur HP |
Dr. Rajeevan Chandel, Er. Gagnesh kumar & Er. Philemon Daniel
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10 Sep -4 Dec, 2008 |
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10. |
AICTE Summer School (1-week) on VLSI Design & Optimization Techniques VDOT-09 E&CED and EED, NIT Hamirpur HP |
Dr. Rajeevan Chandel, Dr. Ashwani Kumar Chandel & Er. Gargi Khanna
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06-10 July, 2009 |
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11 |
AICTE Summer School (1-week) on Engineering Applications of EDA Tools- Verilog & SPICE (EDAT-09) E&CED, NIT Hamirpur HP |
Dr. Rajeevan Chandel, Er. Gagnesh Kumar & Er. Philemon Daniel
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13-17 July, 2009 |
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12. |
Summer School cum Training (1-week) on EDA Tools Verilog & SPICE- ETVS-09 under SMDP-II E&CED, NIT Hamirpur HP |
Dr. Rajeevan Chandel Er. Gagnesh Kumar & Er. Philemon Daniel
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20-24 July, 2009 |
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13. |
Research Issues in Modern VLSI Devices(RIMVD-09) (TEQIP) |
Dr. Vinod Kapoor & Er. Ashwani K. Rana
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6-7 Nov., 2009 |
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14. |
AICTE Winter School (1-week) on Applications of MATLAB in Engineering MAT-09 EED, NIT Hamirpur HP |
Dr. Ashwani Kumar Chandel & Dr. Rajeevan Chandel
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18-22 Dec., 2009 |
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15. |
Workshop cum Training on Cadence EDA Tools under SMDP-II E&CED, NIT Hamirpur HP |
Dr. Rajeevan Chandel
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20-21 Jan., 2010 |
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16. |
Workshop cum Training on Mentor Graphics EDA Tools under SMDP-II E&CED, NIT Hamirpur HP |
Dr. Rajeevan Chandel
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28-29 Jan., 2010 |
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17. |
Workshop on Emerging Research Areas in VLSI & Electronics Engineering ERA-2010 under SMDP-II, MDC, CCE |
Dr. Rajeevan Chandel Dr. Ashwani Kumar Chandel Er. Gargi Khanna
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20-21 May, 2010 |
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18. |
AICTE Summer School (1-week) on Power Quality Problems & Mitigation Methods, PQM-2010 EEED, NIT Hamirpur HP |
Dr. Ashwani Kumar Chandel Dr. Rajeevan Chandel
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5-9 June, 2010 |
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19. |
A Three days Workshop on SPICE under SPEC & SMDP-II |
Dr. Rajeevan Chandel & Er. Rohit Dhiman |
1-3 Oct, 2010 |
2006-Lamp lighting during VDOT 06 along with Prof. Irene Sarkar, Prof. S. Sarkar, Prof V. Kapoor, Dr. AK Chandel
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Proceedings of DTVC-2007 released by Dr RL Chauhan along with Dr CP Ravikumar, Prof IK Bhat & Dr. Rajeevan Chandel
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Dr. Rajeevan Chandel addressing the Guests & Participants of STC 08
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2008-Experts & Coordinators of DTV 08
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BEST FACULTY AWARD E&CE 2006-2007 to Dr. Rajeevan Chandel, Associate Prof, NIT Hamirpur, Jan 08
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2009-Group e-COM 09
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2009 Batch of MTech VLSI
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2009-Participants & Coordinators of EDAT 09
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2009-Lamp lighting in MAZ 09
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2010-Prof. Swapna Banerjee IIT Kgh, Guests & Coordinators of ERA 10
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2010-Prof. Swapna Baneerjee IIT Kgh-the Chief Guest & Resource Person addressing the participants of ERA 10
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SMDP-II VLSI Design & Simulation Lab, E&CED, NIT Hamirpur HP
Three Days SPICE Workshop was organized under SPEC, E&CED NIT Hamirpur. Prof. Vinod Kapoor, Head and faculty of E&CED were present at the inaugural session. The participants developed their soft skills in SPICE, which is versatile EDA software. Electrical and Electronics circuit simulation was taught in detail. Over 100 students benefited from the Expert Lectures and Hands-on-Practice Sessions in OrCAD and TANNER EDA Tools. Dr. (Mrs.) Rajeevan Chandel and Er. Rohit Dhiman along with the SPEC Team coordinated the workshop from 1st to 3rd Oct 2010.
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S.No |
Name of the invited guest |
Designation and Organisation |
Expert lecture(s) /Invited talk(s) Topic |
Dates |
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1. |
Prof. S. Sarkar |
Prof E&CED, IIT Roorkee |
VLSI Design (Expert Lectures in VDOT 06) |
5 and 6 June, 2006, 2007 |
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2. |
Prof (Mrs.) Irene Sarkar |
Prof E&CED, IIT Roorkee |
Classical Optimization Techniques |
6 June, 2006 |
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3. |
Prof. I.K. Bhat |
Director, NIT Hamirpur |
Introduction to Nano-Technology |
5 June, 2006 |
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4. |
Prof. RP Agarwal |
Prof E&CED & Dean, IIT Roorkee |
VLSI Technological Issues( Expert Lectures) |
8 - 9 June, 2006 |
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5. |
Prof. R.S Tomar |
LMIIT, Jaipur |
Microwave Transreceivers & Power Amplifiers for Satellite Communication |
15 May, 2006 |
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6. |
Prof. AK Saxena |
Prof E&CED IIT Roorkee |
III-V GaAs Device Design Issues( Expert Lecture in Nat. Conf. DTVC-2007) |
14-15, July 2007 |
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7. |
Dr. CP Ravikumar |
TI, Bangalore |
Invited Talk in Nat. Conf. DTVC-2007 |
14 -15, July 2007 |
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8. |
Prof. GS Visveswaran |
IIT Delhi |
Delivered an Expert Lecture on Low Power Analog VLSI Design in DTVC-2007. |
14 July 2007 |
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9. |
Prof. Dinesh Kumar |
IIT Bombay |
Took a Tutorial on Analog VLSI Design in DTVC-2007 |
14-15 July 2007 |
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10. |
Prof. Mrityunjay |
IIT Kharagpur |
Delivered Expert lecture on Digital VLSI Design |
26 Oct 2007 |
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11. |
Prof. DR Bhaskar |
Delhi |
Delivered Expert lecture on OTA Design |
26 Oct 2007 |
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12. |
Er. Ramesh Kumar |
TI, Bangalore |
BIST & Design |
5-6 June, 2008 |
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13. |
Prof. AK Saxena |
Prof E&CED IIT Roorkee |
Semiconductor Device Physics |
12-21 July, 2008 |
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14. |
Dr. S DasGupta |
IIT Roorkee |
FinFETS & Novel Devices |
6-7 Nov, 2009 |
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15. |
Prof. B.V.R. Reddy |
Professor E&CE & Dean, IPU, New Delhi |
Delivered an Expert Lecture on an Overview & Recent Trends in Wireless Communication under CCE |
12th Sep 2009 |
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16. |
Prof. Swapna Baneerjee |
Professor E&CE, IIT Kharagpur |
i) Ultrasonography-the Green Technology and ii) Low Power Embedded System Design (invited talk and Expert Lecture respectively) |
20 May 2010 in ERA-2010 under CCE and SMDP-II |
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17. |
Prof AK Chatterjee |
HOD E&CED, TU |
As Expert |
26 June 2010 |
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S.No. |
Name Of Faculty |
Papers in Research Journals |
Paper in Conferences |
Total |
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Int. J. |
Nat. J. |
Int. C. |
Nat. C. |
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1. |
Dr. (Mrs.) Rajeevan Chandel |
15 |
9 |
36 |
41 |
101 |
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2. |
Dr. Lalit Awasthi
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89 |
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3. |
Dr. (Mrs.) Kamlesh Dutta
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80 |
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4. |
Er. Gargi Khanna |
3 |
- |
12 |
23 |
38 |
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5. |
Dr. Ashwani K. Rana |
27 |
01 |
21 |
30 |
79 |
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6. |
Er. Gagnesh Kumar |
01 |
01 |
02 |
04 |
8 |
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7. |
Er. Philemon Daniel |
1 |
1 |
1 |
5 |
8 |
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8. |
Er. Himanshu Sharma |
- |
1 |
- |
1 |
2 |
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9. |
Er. Rohit Dhiman |
01 |
- |
06 |
01 |
8 |
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10. |
Er. Shweta Chauhan
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- |
- |
- |
- |
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TOTAL PUBLICATIONS |
369 |
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Financial Year |
Detail of Publication (DIT duly acknowledged in the Paper ) |
Name of Faculty/ Students to whom Support is provided under SMDP |
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2008-09 |
Manabesh, Pradeep, Uttpal, Rajeevan Chandel, Face Recognition by Gabor Wavelet, International Conference on Cognition & Recognition ICCR08, PES College of Engineering, Mandiya, Karnataka, pp.161-167, 10-12 April 2008.
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Manabesh Ray Pradeep Kr. Subudhi |
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2008-09 |
Gargi Khanna, Preeti, Rajeevan Chandel, S. Sarkar, Cross-talk Mitigation in Coupled VLSI Interconnects, International IEEE VLSI Design & Test Symposium (VDAT-2008), Bangalore, pp.364-374, 23-26 July 2008. |
Dr. R. Chandel Er. Gargi Khanna |
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2009-10 |
Samarth, Ashok, Gargi, International Conference at TU Patiala |
Samarth
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2010-11 |
VDAT-2010 |
Er. Sunil Jadav |
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2010-11 |
VDAT-2010 |
Er. P Daniel |
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2010-11 |
VDAT-2010 |
Dr. Rajeevan Chandel & Er. Gargi Khanna |
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2011-12 |
International Conference Wireless Vitae-2011 |
Dhrub Solanki |
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International Conference IISN-11 |
Purnima Sharma |
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International Conference at BITS Mesra |
Deepesh Ranka |
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International Conference at Jodhpur |
Diwakar Singh |
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National Workshop RAMEMS-11 |
Atul K. Nishad |
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S. No. |
Title of the Ph.D. Thesis |
Supervisor |
Academic year |
Name and Roll no. of the student(s) |
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1. |
Optimal Design and Mitigation of Non-Ideal Effects in VLSI Interconnects |
Dr. (Mrs.) Rajeevan Chandel Dr. Ashwani Kumar Chandel Asso. Prof. EED |
2006 |
Er. Gargi Khanna, AP E&CE Department |
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2. |
VLSI Circuit Partitioning using Evolutionary Optimization Techniques |
Dr. (Mrs.) Rajeevan Chandel Dr. Ashwani Kumar Chandel |
2007 |
Er. Sandeep Singh Gill, Asso. Prof. GNDEC, Ludhiana |
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3. |
Gate Tunneling Current Models for Circuit Simulation of MOSFET Based Nanoscale Devices |
Dr. Vinod Kapoor & Dr. Narottam Chand |
2007 |
Mr. Ashwani K. Rana AP E&CED |
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4. |
Software Based Self-test Techniques for Online Test and Diagnosis of Embedded Circuits |
Dr. (Mrs.) Rajeevan Chandel |
2008 |
Er. Philemon Daniel, AP E&CED |
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5. |
VLSI Interconnect Design for Ultra Low Power Regime |
Dr. (Mrs.) Rajeevan Chandel |
2009 |
Er. Rohit Dhiman, VLSI Faculty under SMDP-II |
The Department of E&C Engineering provides several resources for the use of students, staff and faculty. E&CE offers access to electronic equipments, EDA tools and information used in the various courses taught during the course of undergraduate and post-graduate studies. Additionally, E&CD maintains a very popular VLSI Design and Simulation Lab, Computer and Electronic Simulation lab and MEMS Design Centre cum lab for UG & PG students and faculty. The major EDA Tools and software s available are:
- MEMS-Pro/ TANNER Tools: Perpetual License (5 Users)
- OrCAD: Perpetual License (10 Users)
- MATLAB: Perpetual License (10 Users)
EDA Tools/ Hardware/ Software Facilities
The VLSI Design & Simulation Laboratory established under VLSI Thrust Area Project & SMDP-II Project. It is a fully air conditioned & well furnished with all new modern furniture. The following EDA Tools/ Hardware/ Software Facilities have been received from MC&IT, DIT, Govt. of India under SMDP-II project & the Institute in E&CE Department, NIT Hamirpur HP:
1. Cadence Tools Bundle: 10 licenses
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2. Synopsys SoC Tools Bundle: 5 licenses
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|
|
|
|
|
|
|
Analog and mixed-signal design, full custom IC design, physical verification and extraction consisting of:
|
|
|
|
|
|
|
|
|
|
|
4. HDL Design Verification and Test
HDL design (VHDL-Verilog-System C simulation, FPGA and ASIC synthesis, design-for-test, formal equivalence checking, hardware-software co-verification, system modeling cabling design) consisting of:
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
6. NuHorizons for Xilinx software
A number of FPGA prototyping boards.
(a)
|
3 No. of Opteron-based PCs with 4 GB of main memory, 19" TFT monitor and 64-bit RHEL WS 4.x. |
(b) |
9 No. of P4-based PCs with 2 GB of main memory, 19" TFT monitor and 64-bit RHEL WS 4.x. |
(c)
|
2 No. of external DVD writer, 1 no. of LJ 1320n, 1 no. of Cisco 2950-24 |
(d) |
One HP Laser Jet 1320n printer |
(e)
|
Structured cat-6 network cabling |
8.
|
15 KVA (as 2 * 7.5 KVA parallel mode) online UPS with 30 Minutes of battery backup
|
| 9. |
Cisco 2950-24 Ethernet Switch, 24 ports 10/100
Mbps, Network Manageable (SNMP support)
|
10. |
Tanner EDA Tools & SOFTMEMS EDA Tools: 10 Licences
|
| 11. |
MEMS EDA Tools
|
|
12. |
Xilinx |
|
|
Softwares Description |
Quantity |
|
|
1 |
|
|
1 |
|
|
1 |
|
|
1 |
|
|
1 |
|
|
Hardware Description |
|
|
|
15 |
|
|
5 |
|
|
5 |
|
|
5 |
|
|
10 |
|
|
5 |
|
|
5 |
|
|
Sr. No. |
Title of the lecture
|
Name of Faculty |
Place |
Dates |
|
1. |
An expert lecture delivered & demo sessions on Workshop on SPICE
|
Dr. Rajeevan Chandel |
NIT Hamirpur |
1-3 Oct 2010 |
|
2. |
A talk delivered on VLSI Design Issues-A Review on VDAT-2010 in E&CED
|
Dr. Rajeevan Chandel |
NIT Hamirpur |
27 Aug 2010 |
|
3. |
Expert lectures delivered on Smart Materials, in AICTE Summer School on Intelligent Environment IE-10
|
Dr. Rajeevan Chandel |
NIT Hamirpur |
15 July 2010 |
|
4. |
Expert lectures delivered on Signal Integrity and Power Quality Issues in VLSI Interconnects, PQM-2010
|
Dr. Rajeevan Chandel |
NIT Hamirpur |
8 June 2010 |
|
5. |
Expert lectures delivered on Some Issues in MEMS and VLSI Design, ERA-2010
|
Dr. Rajeevan Chandel |
NIT Hamirpur |
21 May 2010 |
|
6. |
Expert lectures delivered on SPICE as a tool for Engineering applications, in annual Technical Festival NIMBUS-2010
|
Dr. Rajeevan Chandel |
NIT Hamirpur |
24 Feb 2010 |
|
7. |
Expert lectures delivered on Signal Processing using MATLAB, in AICTE Winter School on Applications of MATLAB in Engineering MAT-2009, EE Deptt.
|
Dr. Rajeevan Chandel |
NIT Hamirpur |
18-22 Dec 2009 |
|
8. |
Expert lectures delivered on Engineering Applications of LINUX, in AICTE Winter School on Linux System Administration and Programming LSAP-09, CSE
|
Dr. Rajeevan Chandel |
NIT Hamirpur |
14-18 Dec 2009 |
|
9. |
Expert lectures delivered on Signal Processing, in AICTE Winter School on Advances in Optical and Wireless Communication AOWC-09
|
Dr. Rajeevan Chandel |
NIT Hamirpur |
14-18 Dec, 2009 |
|
10. |
Expert lectures delivered on Introduction to SPICE in VLSI, PSPICE programming using OrCAD, TSPICE using Tanner, Circuit Simulation using SPICE, VLSI Design and demonstrated EDA Tools in AICTE Summer School EDAT-09 and SMDP-II Summer School cum training ETVS-09, E&CE Dept
|
Dr. Rajeevan Chandel |
NIT Hamirpur |
July 2009 |
|
11. |
Expert lectures delivered on MOS Fundamentals, MOS Modelling & Parasitics, Delay and Power in CMOS VLSI, Digital VLSI Design Techniques, VLSI Physical Design and demonstrated EDA Tools in AICTE Summer School VDOT-09, E&CE Dept
|
Dr. Rajeevan Chandel |
NIT Hamirpur |
July 2009 |
|
12. |
Three Expert Lectures delivered on Introduction to VLSI & Nanoelectronics; Trends in VLSI Design & Technology; Design techniques for VLSI for high performance computing, in AICTE Winter School on Recent Advances in Mobile Computing and Communication
|
Dr. Rajeevan Chandel |
NIT Jalandhar |
29 Dec 2008 |
|
13. |
Invited Special Lecture presented on Electronics & Communication in Modern Era, Regional Science Congress-2008
|
Dr. Rajeevan Chandel |
Jawahar Navodaya vidyalaya Paprola, HP |
25 Nov 2008 |
|
14. |
Delivered 5 Expert Lectures on Introduction to SPICE, SPICE programming, OrCAD, Tanner; Circuit Simulation in STTP on HDL-Verilog & SPICE and demonstrated EDA Tools in Lab sessions
|
Dr. Rajeevan Chandel |
NIT Hamirpur |
23 Sep-29 Nov 2008 |
|
15. |
Participated, contributed Research Paper and Chaired Technical session in IEEE symposium on VLSI Design & Test VDAT-2008
|
Dr. Rajeevan Chandel |
Wipro Learning Centre, Bangalore |
23 -26 July, 2008 |
|
16. |
Delivered Expert Lectures on SPICE, MOS Fundamentals, Delay Issues in CMOS Design, Power Dissipation in CMOS, Design Techniques for CMOS VLSI in AICTE Summer School on Design Techniques for VLSI & Nanotechnology, DTV-2008 and demonstrated Lab VLSI EDA Tools
|
Dr. Rajeevan Chandel |
NIT Hamirpur |
12-21 July, 2008 |
|
17. |
Delivered Expert Lectures on SPICE, OrCAD, MOS Modeling and Physical Design of Circuits in AICTE Summer School on Applications of MATLAB, OrCAD/ SPICE in Engineering, MOS-2008 and demonstrated Lab EDA Tools.
|
Dr. Rajeevan Chandel |
NIT Hamirpur |
30 June - 11 July 2008 |
|
18. |
Delivered an expert lecture on VLSI Design Issues & Progress of SMDP-II, E&CED |
Dr. Rajeevan Chandel |
NIT Hamirpur |
20 Feb 2008 |
|
19. |
Three expert Lectures delivered on SPICE for Circuit Simulation, MOSFETS; & CMOS VLSI Design in Short Term Training Programme under NIT Hamirpur Seminars & SMDP-II on VLSI Design & Tools, E&CED
|
Dr. Rajeevan Chandel |
NIT Hamirpur |
4-8 Dec, 2007 |
|
20. |
An INVITED LECTURE was delivered on Recent Trends in Communication & VLSI Technology in Seminar on Information & Communication Technology ICT-2007
|
Dr. Rajeevan Chandel |
IETE Centre, Shimla HP |
26th August 2007 |
|
21. |
Role of SPICE in Circuit Simulation in Short Term Course cum Training Programme under TEQIP & SMDP-II on HDL & VLSI EDA Tools, E&CED
|
Dr. Rajeevan Chandel |
NIT Hamirpur |
21-25 May, 2007 |
|
22. |
Chaired Session on VLSI Design Techniques and was the General Chair cum Coordinator of National Conference on Design Techniques for modern electronic devices, VLSI & Communication systems (DTVC-2007), E&CED
|
Dr. Rajeevan Chandel |
NIT Hamirpur |
14-15 May 2007 |
|
23. |
VLSI Design & EDA Tools, INVITED TALK by Dr. Rajeevan Chandel, NIMBUS-2007, |
Dr. Rajeevan Chandel |
NIT Hamirpur |
31 March, 2007.
|
|
24. |
TWO Expert Lectures Delivered on CMOS Delay & Power Dissipation and Digital VLSI Design in Short Term Course cum Training Programme VLSI Design & Nano-Electronics VDNE-2006, held in E&CED
|
Dr. Rajeevan Chandel |
NIT Hamirpur |
18-22 Dec, 2006 |
|
25. |
Six expert lectures on MOS Models, CMOS Inverter Delay, CMOS Power Dissipation, Digital VLSI Design and CMOS Physical Design were delivered in STC on FPGA Design
|
Dr. Rajeevan Chandel |
Bundelkhand University, Jhansi UP |
09-12 Dec, 2006 |
|
26. |
Chaired Session on VLSI Design & NanoTechnology & Delivered an INVITED TALK on VLSI Design Issues in Nano-Regime Technologies National Conference on Recent Advances in Electronics and Communication Technology (RAECT-06), , E&CED
|
Dr. Rajeevan Chandel |
GNDEC Ludhiana (Pb). |
9-10 November 2006 |
|
27. |
FIVE Expert Lectures Delivered on CMOS Delay, Power Dissipation, Digital VLSI Design, CMOS Physical Design and SPICE in Short Term Course cum Training Programme VLSI Design & Optimization Techniques VDOT-2006, held in E&CED
|
Dr. Rajeevan Chandel |
NIT Hamirpur |
05-09 June, 2006 |
|
28. |
TANNER Tools & SOFTMEMS Tools demonstrated to the 34-participants of STC on VDOT-2006 as above and lab sessions
|
Dr. Rajeevan Chandel |
NIT Hamirpur |
07-08 June, 2006 |
|
29. |
Low power VLSI Techniques in workshop on Emerging research areas in VLSI & Electronics Engg.
|
Er. Gargi Khanna |
NIT Hamirpur |
21 May, 2010 |
|
30. |
Interconnects in VLSI in summer school on Design technique for VLSI & Nanotechnology
|
Er. Gargi Khanna |
NIT Hamirpur |
14 July, 2008 |
|
31. |
Low power design techniques in summer school on Design technique for VLSI & Nanotechnology
|
Er. Gargi Khanna |
NIT Hamirpur |
16July, 2008 |
|
32. |
Clock Distribution in summer school on Design technique for VLSI & Nanotechnology
|
Er. Gargi Khanna |
NIT Hamirpur |
21 July, 2008. |
|
33. |
Satellite Communication in National Workshop on VLSI & Communication Systems
|
Er. Gargi Khanna |
NIT Hamirpur |
5 June, 2008 |
|
34. |
VLSI Interconnects in STC on VLSI Design & Tools
|
Er. Gargi Khanna |
NIT Hamirpur |
5 Dec,2007 |
|
35. |
On Interconnects in VLSI Circuits in STC cum training Programme on VLSI Design & Recent Trends in Nano- Electronics VDNE-06 |
Er. Gargi Khanna |
NIT Hamirpur |
18 -22 Dec., 2006 |
|
36. |
Marching towards Nanoelectronics
|
Er. Ashwani K. Rana |
NIT Hamirpur, STC (VDNE-2006) |
18 Dec.2006 |
|
37. |
Nanoscale Devices
|
Er. Ashwani K. Rana |
NIT Hamirpur, STC (VDNE-2006) |
19 Dec.2006 |
|
38. |
Micro fabrication Techniques adopted in VLSI
|
Er. Ashwani K. Rana |
Rayat Institute of Engg. and Info. Tech., Railmajra, (Pb) in Nat. Con. (LTTC-06) |
26 Aug 2006,
|
|
39. |
Nano Device Fundamentals
|
Er. Ashwani K. Rana |
MED, NIT Hamirpur |
22 dec 2007 |
|
40. |
Nanotechnology-safety Aspect |
Er. Ashwani K. Rana |
MED, NIT Hamirpur |
12 Mar 2008 |
|
41. |
Applications of Timer/Op-Amps
|
Er. Manoranjan Rai |
NIT,Hamirpur (HP) |
7-11 April, 08 |
|
42. |
Applications of Operational Amplifier |
Er. Manoranjan Rai |
NIT,Hamirpur (HP) |
4 -8 Nov, 2008 |
-
M.Tech Degree Programme in VLSI Design Automation & Techniques has been started at NIT Hamirpur HP since July 2006, with a full intake of 18 students.
-
A subject ECE-413 VLSI Design Techniques is introduced and being taught to B.Tech. E&CED Final Year (8th Semester), from January 2006.
-
A subject ECE-411 VLSI Design Techniques and also a LAB on VLSI Design Automation for B.Tech. E&CED Final Year (7th Semester) is now included in the revised scheme and syllabus of B.Tech. E&CE.
-
A subject ECE-363 MEMS and Sensors Design is introduced and being taught to B.Tech. E&CED Third Year since January 2010.
|
S.No |
Name of Professional Societies/Institutions |
Name of Faculty |
Status |
National/ International |
|
1. |
ISTE LM-6057 |
Dr. Vinod Kapoor |
Life Member |
National |
|
2. |
IETE(I) M120064 |
Dr. Vinod Kapoor |
Life Member |
National |
|
3. |
Institution of Engineers (India) M/114678/5 |
Dr. Vinod Kapoor |
Life Member |
National |
|
4. |
ISTE LM-12332 |
Dr. Rajeevan Chandel |
Life Member |
National |
|
5. |
IETE(I) M146531 |
Dr. Rajeevan Chandel |
Life Member |
National |
|
6. |
VLSI Society of India (VSI) Bangalore M# 2481 |
Dr. Rajeevan Chandel |
Member |
National |
|
7. |
IEEE |
Dr. Rajeevan Chandel |
Student M |
International |
|
8. |
ISTE |
Er. Surender Kumar Soni |
Life Member |
National |
|
9. |
ISTE |
Er.Ashok kumar |
Life Member |
National |
|
10. |
ISTE |
Er. Gargi Khanna |
Life Member |
National |
|
11. |
Indian Microelectronic Society, Panjab University, Chandigarh |
Er. Gagnesh Kumar |
Life Member |
National |
|
12. |
VLSI society of India, Bangalore |
Er. Gagnesh Kumar |
5 Years, Jan 2011 - Jan 2016 |
National |
|
13. |
IEEE |
Er. Philemon Daniel P |
Member |
National |
|
S.No. |
Title |
Faculty name |
Place |
Dates |
Duration |
|
1. |
1st ZOPP Workshop |
Dr. Vinod Kapoor Dr. Lalit Awasthi
|
IIT Madras, Chennai |
3 - 5 Feb., 2006 |
3 Days |
|
2. |
National Symposium on Nano materials Design: Bridging Nano length Scale NSNMD- 2007 |
Dr. Vinod Kapoor |
NIT Hamirpur |
17 November, 2007 |
1 Day |
|
3. |
All India Seminar on Recent Trends in VLSI |
Dr. (Mrs.) Rajeevan Chandel |
IIT Roorkee |
29-30 September, 2001 |
2 Days |
|
4. |
QIP Short Term Course on VLSI Design and Technology |
Dr. (Mrs.) Rajeevan Chandel |
IIT Roorkee |
2-6 June, 2003 |
One Week |
|
5. |
VLSI Design and Technology |
Dr. (Mrs.) Rajeevan Chandel |
IIT Roorkee |
11-16 October, 2004 |
One Week |
|
6. |
Professional Excellence & Ethics for Teachers |
Dr. (Mrs.) Rajeevan Chandel |
IIT Roorkee |
31 Jan - 4 Feb, 2005 |
One Week |
|
7. |
2nd ZOPP-07 Workshop
|
Dr. (Mrs.) Rajeevan Chandel |
IISc, Bangalore |
12-14 Feb 2007 |
3 Days |
|
8. |
Symposium on Advances in NanoMaterials |
Dr. (Mrs.) Rajeevan Chandel |
NIT Hamirpur HP |
17 Nov 2007 |
1 Day |
|
9. |
3rd ZOPP-08 Workshop under SMDP-II |
Dr. (Mrs.) Rajeevan Chandel |
IIT Kanpur |
11-13 Feb, 2008 |
3 Days |
|
10. |
National Conference on Recent Advances in Innovative Materials RAIM-08 |
Dr. (Mrs.) Rajeevan Chandel |
ASD NIT Hamirpur HP |
16-17 Feb, 2008 |
2 Days |
|
11. |
Joint meeting of Semiconductor Research Corporation SRC, TI & NIT Hamirpur |
Dr. (Mrs.) Rajeevan Chandel |
Taj, New Delhi |
16-18 April, 2008 |
3 Days |
|
12. |
12th IEEE Symposium VLSI Design and Test VDAT-08 |
Dr. (Mrs.) Rajeevan Chandel |
Wipro, Bangalore IEEE, VSI and others |
24-26 July 2008 |
3 Days |
|
13. |
IPV-VI Training |
Dr. Kamlesh Dutta |
CEDT IISc Bangalore |
6-8 October 2009 |
4 Days |
|
14. |
RF IC Design
|
Sh. Surender Soni |
IIT Madras
|
Nov. 13-24, 2006 |
2 weeks |
|
15. |
IEEE Asia Pacific Conference on Circuits and Systems (APCCAS-2010) |
Er.Gargi khanna |
Kuala lumpur, Malaysia |
6 -9 Dec. 2010 |
4 Days |
|
16. |
14th VLSI Design and Test Symposium VDAT 2010 |
Er.Gargi khanna |
Chitkara University,Himachal Pradesh |
7-9 July 2010 |
3 Days |
|
17. |
AICTE/MHRD sponsored short term course on Science & Technology of Gem Manufacturing |
Er.Gargi khanna |
NIT Hamirpur |
23-24 July, 2010 |
2 Days |
|
18. |
Workshop at on MEMS Design using IntelliSuite and COMSOL |
Er.Gargi khanna |
IIT Delhi |
7-10 April, 2010 |
4 Days |
|
19. |
summer school on Application of MATLAB, OrCAD/ SPICE simulation tools in engg. (MOS-2008) |
Er.Gargi khanna |
NIT Hamirpur |
31 June to 11July, 2008 |
2 Weeks |
|
20. |
12th IEEE Symposium on VLSI Design & Test |
Er.Gargi khanna |
Bangalore |
23-26 July, 2008 |
4 Days |
|
21. |
IEP on Low Power VLSI Design |
Er.Gargi khanna |
IIT Kharagpur |
11to 22 Sept., 2006 |
2 Weeks |
|
22. |
STC on VLSI design and Optimization Technique |
Er.Gargi khanna & Er. Surinder Soni |
NIT Hamirpur |
5 to9 June, 2006 |
1 Week |
|
23. |
Digital IC Design
|
Er. Ashwani K. Rana |
IIT Kanpur,
|
3-14 July, 2006 |
2 Week |
|
24. |
Nanomaterials Design : Bridging Nano Length Scale |
Er. Ashwani K. Rana |
NIT Hamirpur |
17 Nov., 2007 |
One Day |
|
25. |
Nano Bio Chips |
Er. Ashwani K. Rana |
Indian Statistical Institute, Kolkata |
7 August, 2007 |
One Day |
|
26. |
Nanostructured Material: Research and Development Status |
Er. Ashwani K. Rana |
IIT Roorkee,
|
18-22 Feb, 2008
|
One week |
|
27. |
Application of MATLAB/OrCad/PSpice simulation tools in Engg. (MOS-2008) |
Er. Krishan Kumar |
Electrical &ECED Department, NIT Hamirpur(HP) |
30June-11July, 2008 |
Two Weeks |
|
28. |
Summer School on Engineering Application on EDA tools using Verilog and PSPICE |
Er. Krishan Kumar |
E&CED, NIT Hamirpur[H.P.] |
13-17July, 2009 |
One Week |
|
29. |
Workshop on Research issues in Modern VLSI Devices (RIMVD-09) |
Er. Krishan Kumar |
E&CED NIT Hamirpur. |
06-07 Nov., 2009 |
2 Days |
|
30. |
Engg. Application of EDA tools Verilog and Spice |
Er.Vinod Kumar |
NIT Hamirpur |
13 July to 17July, 2009 |
5 Days |
|
31. |
Emerging Research areas in VLSI and Electronics Engg. |
Er.Vinod Kumar |
NIT Hamirpur |
20-21May, 2010 |
2 Days |
|
32. |
VLSI Design and Optimization Techniques |
Er.Vinod Kumar |
NIT Hamirpur |
06 to 10 July,2010 |
5 Days |
|
33. |
Design technologies for VLSI and NANOTECHNOLOGY |
Er.Vinod Kumar |
NIT Hamirpur |
12 to 21 July,2008 |
10 Days |
|
34. |
VLSI and Communication system |
Er. Vinod Kumar |
NIT Hamirpur |
5-6 June 08 |
2 Days |
|
35. |
Short Term Course on VLSI Signal Processing |
Er. Manoranjan Rai |
Offered by IIT, Kharagpur at IIT, Kharagpur |
29 Nov - 4 Dec, 07 |
1Week |
|
36. |
Workshop on Microcontroller, Power- Electronics and Power Management |
Er. Manoranjan Rai |
SJCE, Mysore; organized by Texas Instruments, India, IEEE-SJCE Chapter & Deptt of E&CE, SJCE, Mysore |
3 -5June, 08 |
2 Days |
|
37. |
Summer School on Applications of MATLAB, OrCAD/SPICE Simulation Tools in Engg. (MOS-2008) |
Er. Manoranjan Rai |
NIT, Hamirpur, MHRD/AICTE sponsored |
30 June - 11 July, 08 |
13 Days |
|
38. |
Summer School on VLSI Design & Optimization Techniques (VDOT-2009)
|
Er. Manoranjan Rai |
E&CE Department, NIT-Hamirpur (HP) MHRD/AICTE sponsored |
6 - 10 July, 2009 |
4 Days |
|
39. |
Short Term Course on Advanced Signal Processing with Applications in MATLAB
|
Er. Manoranjan Rai |
EE Department, NIT-Hamirpur (HP) AICTE sponsored |
13-17 July, 2009 |
4 Days |
|
40. |
Workshop on Emerging Research Areas in VLSI & Electronics Engineering (ERA-2010)
|
Er. Manoranjan Rai |
E&CE Department, NIT-Hamirpur (HP)Under SMDP-II, CCE, MDC & E&CE |
20 - 21May, 2010 |
2 Days |
|
41. |
IEP on VLSI Testing and Verification |
Er. Philemon Daniel |
IISc Bangalore |
10 to 19 March |
10 Days |
|
42. |
IEP on Linux System admin and EDA Tools Installation |
Er. Philemon Daniel |
CEERI, Pilani |
14 to 18 October, 2008 |
5 Days |
|
43. |
IEP on India Chip Tapeout 2010 |
Er. Philemon Daniel |
NIT Trichy |
June 15-20, 2010 |
6 Days |
|
44. |
VDAT 2010 |
Er. Philemon Daniel |
Chandigarh |
7-9 July 2010 |
3 Days |
|
45. |
IEP on Xilinx FPGA workshop |
Er. Philemon Daniel |
IIT Karaghpur |
26 Feb to 1March 2007 |
4 Days |
|
46. |
Engineering Applications of EDA tools using verilog and Spice |
Er. Rakesh Sharma |
NIT Hamirpur |
13 to 17 July 2009 |
One Week |
|
47. |
VLSI Design and Optimization Techniques |
Er. Rakesh Sharma |
NIT Hamirpur |
06 to 10 July 2009 |
One Week |
|
48. |
Summer School on EDA-Tools-Verilog &SPICE |
Er. Rohit Dhiman |
N.I.T. Hamirpur |
20-24 July, 09 |
One Week |
|
49. |
Workshop on Research Issues in Modern VLSI Devices |
Er. Rohit Dhiman |
N.I.T. Hamirpur |
6-7 Nov. , 09 |
Two Days |
|
50. |
Workshop on Emerging Research Areas in VLSI & Electronics Engineering |
Er. Rohit Dhiman |
N.I.T. Hamirpur |
20-21 May, 2010 |
Two Days |
|
51. |
IEP on Memory design and test |
Mr. Praveen Vijayan (10M410) |
NIT Jaipur |
11-15 Dec., 2010 |
One Week |
|
52. |
IEP on VLSI Applications in Biomedical Engg. |
Mr. Harshit (10M412) Mr. Dhirender (10M414)
|
IIT Kharagpur |
7-12 March, 2011 |
One Week |
|
53. |
Xillinx Workshop |
Mr. Sudarshan(10M417) MR.Praveen Vijayan (10M410)
|
Pune |
1 March, 2011 |
One Day |
|
54. |
Semiconductor Memory Design & Testing |
Er. Praveen Vijayan (10M410) |
MNIT Jaipur |
11-15 Dec 2010 |
One Week |
|
55. |
IEP on Low noise Low power Op-Amp Design |
Mr. Atul Kumar Nishad (09M401) |
IIT Delhi |
14 -19 March, 2011 |
One Week |
|
56. |
Analog IC Design
|
Sh. Gurvinder Singh |
IIT Delhi |
Jul. 2-13, 2007
|
2 weeks |
|
57. |
Digital Design and Synthesis |
Sh. Parminder Singh |
IIT Kanpur
|
Dec. 10-21, 2007
|
2 weeks |
|
58. |
IEP on Linux System Administration and EDA Tools Installation
|
Er. Gagnesh Kumar Er. Philemon Daniel Er. Lalit Mohan |
CEERI Pilani
|
Oct. 14 to 18, 2008
|
1 week |
|
59. |
Synopsys EDA Training, SMDP-II
|
Neha Aggarwal V. Sulochana Samarth Saxena V. Praveen Kumar Yaswant Kr |
IIT Kanpur
|
Sep.20 to 24, 2008
|
1 week |
PUBLICATIONS IN NATIONAL/INTERNATIONAL JOURNALS (year wise):
|
Sr. No. |
Title |
Author |
Name of Journal |
Publisher |
Vol. & Issue, Page |
Year |
|
1. |
Investigations on Interchannel Cross-talk at ADM for an Optical Ring Network |
Vinod Kumar, Ajay K. Sharma, R.A. Agarwala |
OPTIK - International Journal for Light and Electron Optics, |
Elsevier Science, Germany |
Vol. Optik 121 PP 45-49 |
2010 |
|
2. |
Analytical Investigations on Cross-talk in Fiber Raman Amplification for WDM Systems |
Vinod Kumar, Ajay K. Sharma, R. A. Agarwala
|
OPTIK - International Journal for Light and Electron Optics, |
Elsevier Science, Germany |
Vol. Optik 121 PP 50-53 |
2011 |
|
3. |
Performance evaluation of SCM-WDM communication in the presence of SRS induced crosstalk for different types of fiber |
Naresh Kumar, Ajay K. Sharma, Vinod Kapoor
|
International Journal for Light and Electron Optics OPTIK |
Elsevier |
Accepted & in Press-Dec. |
2010 |
|
4. |
Low Power CMOS VCO for Wide Band Communication Applications |
Dhrub Solanki and Rajeevan Chandel |
Electrical India |
Vol. 51, No. 2, pp. 46-52 Feb |
2011. |
|
|
5. |
Design and Analysis of LC-VCO using MEMS Spiral Inductor |
Dhrub Solanki, Rajeevan Chandel, T.Alam, A. Nishad |
International Journal of Micro and Nano Systems |
Int. Sc. Press India, |
Vol. 2, No. 1, pp. 47-51 |
2011. |
|
6. |
Design and Analysis of a Modified Low Power CMOS Full Adder Using Gate-Diffusion Input Technique |
Kiran K. Chaddha, Rajeevan Chandel
|
Journal of Low Power Electronics |
ASP |
Vol. 6, No. 4, pp. 482-490 |
2010 |
|
7. |
Design and Analysis of Sub-DT Sub-Domino Logic Circuits for Ultra Low Power Applications |
Ashutosh Nandi, Rajeevan Chandel
|
Journal of Low Power Electronics |
ASP |
Vol. 6, No. 4, pp. 513-520 |
2010 |
|
8. |
A Comparative Analysis of Voltage-Scaled Two Operand Binary Adders |
Rajeevan Chandel, Devesh P. Singh, R. Banta, R. Karan, P. Bhatt
|
Journal of Active and Passive Electronic Devices (JAPED) |
Old city publishers |
Vol.5, No.3-4, pp. 295-309 |
2010 |
|
9. |
Genetic Algorithm Based Approach To Circuit Partitioning |
Sandeep Singh Gill, Rajeevan Chandel, Ashwani Chandel |
International Journal of Computer and Electrical Engineering (IJCEE) |
International Association of Computer Science and Information Technology Press (IACSIT) |
Vol. 2 No. 2, April 2010 |
pp. 212-218 |
|
10. |
Comparative study of Ant Colony and Genetic Algorithms for VLSI circuit partitioning |
Sandeep Singh Gill, Rajeevan Chandel, and Ashwani Chandel
|
International Journal of Computer Systems Science and Engineering (IJCEE) |
International Association of Computer Science and Information Technology Press (IACSIT) |
Vol. 4, No. 2, 2009 |
pp. 104-108 |
|
11. |
Performance Analysis of Voltage-Scaled Static and Dynamic CMOS Circuits |
Rajeevan Chandel, Y. Nataraj, Gargi khanna
|
Journal of Nanoelectronics & Optoelectronics (JNO) |
ASP, USA |
vol.3, no.2, 2008 |
pp. 171-176
|
|
12. |
Delay and Power Management of Voltage-Scaled Repeaters for Long Interconnects |
Rajeevan Chandel, S. Sarkar and R.P. Agarwal
|
International Journal of Modelling & Simulation |
ACTA Press, Canada |
vol. 27, no. 4, 2007 |
pp. 333-339 |
|
13. |
Investigations on Short-Circuit Power Dissipation in Repeater Loaded VLSI Interconnects |
Rajeevan Chandel, S. Sarkar, and Ashwani Chandel
|
Journal of Low Power Electronics |
MDPI |
vol. 3, no. 3, 2007 |
pp. 337-344 |
|
14. |
An Analysis of Interconnect Delay Minimization by Low-Voltage Repeater Insertion |
Rajeevan Chandel, S. Sarkar and R.P. Agarwal
|
Microelectronics Journal |
Elsevier Science |
Vol. 38, No. 4-5, April-May 2007 |
pp 649-655 |
|
15. |
Repeater stage timing analysis for VLSI resistive interconnects |
Rajeevan Chandel, S. Sarkar and R.P. Agarwal
|
Microelectronics International |
Emerald UK |
Vol. 23, No. 3, 2006 |
pp. 19-25 |
|
16. |
Repeater insertion in global interconnects in VLSI circuits |
Rajeevan Chandel, S. Sarkar and R.P. Agarwal
|
Microelectronics International |
Emerald UK |
Vol. 22, No. 1, Jan 2005 |
pp. 43-50
|
|
17. |
Delay Analysis of a Single Voltage-Scaled-Repeater driven Long Interconnect |
Rajeevan Chandel, S. Sarkar and R.P. Agarwal
|
Microelectronics International |
Emerald UK |
Vol. 22, No. 3, 2005 |
pp. 28-33 |
|
18. |
Transition Time Considerations in Voltage-Scaled Repeaters |
Rajeevan Chandel, S. Sarkar and R.P. Agarwal
|
Microelectronics International |
Emerald UK |
Vol. 22, No. 3, 2005 |
pp.39-40 |
|
19. |
High Speed Energy Efficient signal Transmission on Global VLSI Interconnect |
Sunil Jadav, Gargi Khanna, and Ashok Kumar
|
International Journal of Information and Telecommunication Technology |
|
Nov. 06, 2010. |
pp. No- 52 -56 |
|
20. |
A new fuzzy based localization error minimization approach with optimized beacon range |
Vinay Kumar, Ashok Kumar, Surender Soni
|
International Journal of Computer Application |
|
|
|
|
21. |
A Study of Physical Properties of Ge-Se-In Glassy Semiconductors |
R. Kumar, A. Kumar, V.S. Rangra
|
Journal of Optoelectronic and Advanced Materials-Rapid Communication |
|
vol. 4, p. 1554 -1558 |
issue 10/2010 |
|
22. |
Analysis of non-ideal effects in coupled VLSI interconnects with active and passive load variation |
Gargi Khanna, Rajeevan Chandel, Ashwani Chandel, S.Sarkar
|
Microelectronics International |
Emerald UK |
vol. 26, no. 1 Jan. 2009. |
pp. 3-9 |
|
23. |
Analysis of non-ideal effects in coupled VLSI interconnects with active and passive load variation |
Gargi Khanna, Rajeevan Chandel, Ashwani K. Chandel, S. Sarkar
|
Microelectronics International |
Emerald UK |
vol. 26, no. 1, 2009. |
pp. 3-9 |
|
24. |
Analytic Modeling of Non-Uniform Graded Dopant Profile of Polysilicon Gate in Gate Tunneling Current for N-MOSFET in Nanoscale Regime |
Ashwani Kumar, S.Dasgupta |
Journal of Computational and Theoretical Nanoscience (CTN), |
American scientific publisher |
Vol 4, No 1
|
pp179-185, 2007 |
|
25. |
Unified Compact Modeling of a gate Tunneling Current considering Image Force Induced Barrier Lowering for a nanoscale N-MOSFET |
Ashwani Kumar, S.Dasgupta |
Journal of Computational and Theoretical Nanoscience (CTN), |
American scientific publisher |
Vol 4, No 3
|
pp 482-487, 2007 |
|
26. |
Significance of Nanotechnology in construction Engineering |
Ashwani K. Rana, Shashi B. Rana, Anjna Kumari, Vaishnav Kiran
|
International Journal of Recent trends in Engineering |
Academy Publisher |
Vol. 1, No. 4 |
pp 46-48, 2009 |
|
27. |
A Compact gate tunnel current model for nano scale MOSFET with sub+1nm gate oxide |
Ashwani Kumar, Narottam Chand and Vinod Kapoor,
|
International Journal of Applied Engineering Research (IJAER). |
|
Vol.1, No.1 2010 |
PP175-193 |
|
28. |
Trap assisted tunneling Model for gate current in nano scale MOSFET with high-K Gate dielectrics |
Ashwani Kumar, Narottam Chand, Vinod Kapoor |
International Journal of Electrical and Electronics Engineering-WASET Journal |
WASET |
Vol.3, No.7, 2009 |
PP402-409 |
|
29. |
Analytical gate current modeling in nanoscale MOSFET with high gate static structure. |
Ashwani Kumar, Narottam Chand, Vinod Kapoor
|
Journal of Electrical and Electronics Engineering. |
|
Vol.3, No.2, 2010 |
PP169-174 |
|
30. |
Impact of Gate Engineering on gate leakage behaviour of nanoscale MOSFET with high dielectrics |
Ashwani Kumar, Narottam Chand, Vinod Kapoor
|
Journal of Nano Electronics and Opto electronics |
|
Accepted and in press- Jan.2011 |
|
|
31. |
Gate tunnel current calculation for NMOSFET based on Deep Sub-Micron Effects |
Ashwani Kumar, Narottam Chand and Vinod Kapoor
|
International Journal of Electrical and Electronics Engineering |
IEEE |
Vol.3, No.1 2009 |
PP 426-434 |
|
32. |
Comparative analysis and optimization of current mirrors |
Vinod Kumar, Himanshu Sharma, Rituraj singh Rathore
|
Journal of Multidisciplinary Engineering Technologies |
Bharti vidyapeeth College of Engineering,New Delhi |
Vol 4 No.1 July -Dec,2009 |
pp 29-33
|
|
33. |
A Flexible Programmable Memory BIST Architecture |
Philemon Daniel, Rajeevan Chandel
|
IETE Journal of Education |
IETE |
Year: 2010, Volume: 51, Issue: 2 |
Page: 67-74 |
|
34. |
Performance evaluation of Adaptive modulation of data spread OFDM |
Rakesh Sharma, Sachin Dhaiya
|
IJEE |
Serial Publications |
Vol 1, Issue1 |
27-30 |
|
35. |
Delay Analysis of a CMOS Buffer Driven RLC Interconnect Load for Sub-Threshold Applications |
Rohit Dhiman, Rajeevan Chandel |
International Journal of Modelling and Simulation, ACTA Press.
|
ACTA Press |
|
|
|
Title |
Author(s) |
Name of Conference |
Place |
Year |
|
|
1. |
Inter satellite Optical Wireless Communication a Vision for Next Generation Satellite Communication-An Overview |
Naresh Kumar, Ajay K. Sharma, Vinod Kapoor |
National conference on Communications & Networking (NCCN-10) |
Sant Longowal Institute of Engineering 2010 & Technology |
2010 |
|
2. |
Radio Over Fiber Networks: Perspectives and Challenges |
Naresh Kumar, Ashwani Kumar, Ajay K.Sharma, Vinod Kapoor |
National Conference on Next Generation Computing Information Systems |
Model Institute of Engineering & Technology Jammu |
2009 |
|
3. |
Spintronics-A Bright Future For Electronics |
Naresh Kumar, Ashwani kumar, Vinod Kapoor |
National Conference RAEE-2008 |
NIT Hamirpur |
2008 |
|
4. |
Next Generation Optical Networks-Challenges and Opportunities |
Naresh Kumar, Ajay K.Sharma, Vinod Kapoor |
National Conference ETCC-2008 |
NIT Hamirpur |
2008 |
|
5. |
Radio Over Fiber Technologies and Systems:New Opportunities |
Naresh Kumar, Ajay K.Sharma, Vinod Kapoor |
National Conference on Optical and Wireless Communication (NCOW-2008) |
DAV Institute of Engineering & Technology Jalandhar |
2008 |
|
6. |
Analysis of Noise Tolerant Techniques in TSPC Logic |
Purnima Sharma, Rajeevan Chandel, Dhrub Solanki, Sankar Sarkar |
IEEE International Conference on Advances in Computing & Communication, ICACC 11 pp. 318-321 |
NIT Hamirpur |
8-10 April, 2011. |
|
7. |
Resistive Power Analysis Of CMOS Driven Global RC Interconnect
|
Rohit Dhiman, Rajeevan Chandel, Tafseer Alam |
IEEE International Conference on Advances in Computing & Communication, ICACC 11 pp. 389-392 |
NIT Hamirpur |
8-10 April, 2011. |
|
8. |
Design Issues in CMOS Oscillators
|
Dhrub Solanki, R. Chandel, T. Alam , A.K. Nishad |
IEEE International Conference on Advances in Computing & Communication, ICACC 11 pp. 347-350 |
NIT Hamirpur |
8-10 April, 2011. |
|
9. |
Simulative Analysis of Adder Cells for Performance Enhancement |
Rakhi Puri, Gargi Khanna, Rajeevan Chandel |
IEEE International Conference on Advances in Computing & Communication, ICACC 11 pp. 336-340 |
NIT Hamirpur |
8-10 April, 2011. |
|
10. |
Analysis of Interconnect Delay Considering Crosstalk Noise in VLSI Circuits |
Diwakar Singh, Gargi Khanna, M. Girish Kumar, Rajeevan Chandel |
IEEE International Conference on Advances in Computing & Communication, ICACC-11, pp. 429-431 |
NIT Hamirpur |
8-10 April, 2011. |
|
11. |
Inductance Analysis of Mixed Carbon Nanotube Bundle Interconnects
|
Tafseer Alam, Rohit Dhiman, Rajeevan Chandel, Dhrub Solanki |
pp. 354-357 |
NIT Hamirpur |
8-10 April, 2011. |
|
12. |
Gate Diffusion Input: A Power Efficient Design Technique for VLSI Circuits
|
Atul K. Nishad, R. Chandel, S. Jadav , D. Solanki |
IEEE International Conference on Advances in Computing & Communication, ICACC-11 pp. 432-435 |
NIT Hamirpur |
8-10 April, 2011. |
|
13. |
Design of LC-VCO for Low Power Narrowband Electronic Applications |
Dhrub Solanki, Rajeevan Chandel, T. Alam, A.K Nishad |
2nd INTERNATIONAL Conference on Wireless Communications, Vehicular Technology, Information Theory and Aerospace & Electronic Systems (WVITAE-2011) |
Le Royal Meridien Chennai |
28 Feb - 3 March, 2011 |
|
14. |
Investigations on Mobility Degradation in MOSFETs in Nano Regime |
Purnima Sharma, Rajeevan Chandel |
5th INTERNATIONAL MULTI CONFERENCE on Intelligent Systems, Sustainable, New and Renewable Energy Technology & Nanotechnology (IISN-2011) |
Institute of Science & Technology Klawad-133105 Haryana, India |
February 18-20, 2011 |
|
15. |
Comparative Analysis of Noise Tolerant Techniques in Super and Sub Threshold Regimes |
Purnima Sharma, Rajeevan Chandel, S. Sarkar |
5th INTERNATIONAL MULTI CONFERENCE on Intelligent Systems, Sustainable, New and Renewable Energy Technology & Nanotechnology (IISN-2011) |
Institute of Science & Technology Klawad-133105 Haryana, India |
February 18-20, 2011 |
|
16. |
Mixed Carbon Nanotube Bundle: Capacitance Analysis and Comparison with Copper Interconnect |
Tafseer Alam, Rajeevan Chandel, Rohit Dhiman |
INTERNATIONAL Conference on Emerging Trends in Electrical and Computer Technology (ICETECT-2011) |
|
2011 |
|
17. |
Resistive Analysis of Mixed Carbon Nanotube Bundle Interconnect and its Comparison with Copper Interconnect |
Tafseer Alam, Rajeevan Chandel and Rohit Dhiman |
INTERNATIONAL Conference ICWET 2011 |
Mumbai, Maharashtra, India |
February 25-26, 2011 |
|
18. |
Analysis of Noise Tolerant Techniques in Super and Sub Threshold Regimes |
Purnima Sharma, Rajeevan Chandel, S. Sarkar |
INTERNATIONAL Conference on -Advances in Communications, Embedded Systems and Computing (ICACEC-2011) |
Sagar Institute of Research &Technology, Bhopal, |
14-15, January 2011.
|
|
19. |
Design Issues in CMOS Oscillators |
Dhrub Solanki, Rajeevan Chandel |
INTERNATIONAL Conference on Advances in Communications, Embedded Systems and Computing (ICACEC) |
Sagar Institute of Research and Technology Bhopal, |
14-15 January 2011 |
|
20. |
Design and Analysis of LC-VCO for Ultra Wide-Band Operation |
Dhrub Solanki and Rajeevan Chandel |
INTERNATIONAL Conference BEATS |
NIT Jalandhar |
-19 December 2010. |
|
21. |
Swarm Intelligence based Circuit Partitioning |
Sandeep Singh Gill, Rajeevan Chandel, Ashwani Kumar Chandel |
INTERNATIONAL Asia Pacific Conference on PG Research in Microelectronics & Electronics |
Shanghai China |
September 22 - 24, 2010 |
|
22. |
Simulated Annealing based Delay Centric VLSI Circuit Partitioning |
Sandeep Singh Gill, Rajeevan Chandel, Ashwani Kumar Chandel, P.S. Sandhu |
3rd IEEE INTERNATIONAL Conference on Computer Science and Information Technology (ICCSIT) |
|
9-11 July 2010. |
|
23. |
A Low Power Design Technique for Improving Noise Tolerance in Domino Logic Circuits |
Viveka Paliwal, Rajeevan Chandel |
INTERNATIONAL CONFERENCE on Emerging Trends in Signal Processing and VLSI Design |
GNEC, Hyderabad |
June 2010 |
|
24. |
Design of a Low Power flip-flop using CMOS deep sub micron technology |
Surya Naik, Rajeevan Chandel |
IEEE INTERNATIONAL CONFERENCE on Recent Trends in Information, Telecommunication and Computing (ITC-10) |
Kochi, Kerala, India |
12-13 March 2010 |
|
25. |
Performance Analysis of CNFET and CMOS Technologies, |
Ketav Sharma, Nipun Mahajan, Rajeevan Chandel |
4th INTERNATIONAL MULTI CONFERENCE on Intelligent Systems and Nanotechnology (IISN-2010) |
Institute of Science & Technology Klawad-133105 Haryana, India |
February 26-28, 2010 |
|
26. |
Performance analysis of Low Power Design Techniques for VLSI Circuits |
Sandeep Sharma, Rajeevan Chandel |
National Conference on Recent Advances in Electrical & Electronics Engineering RAEEE-09, |
NIT Hamirpur |
23-24 Dec. 2009. |
|
27. |
Performance analysis of Static and Dynamic CMOS Logics |
Rajneesh Sharma, Rajeevan Chandel |
National Conference on Recent Advances in Electrical & Electronics Engineering RAEEE-09 |
NIT Hamirpur |
23-24 Dec. 2009 |
|
28. |
Performance Evaluation of Audio Amplifiers |
Ambuj Agarwal, K. Ashish, T. Avinash, Rajeevan Chandel |
National Conference on Emerging Trends in Computing & Communication ETCC-08 |
NIT Hamirpur HP |
Dec 30-31, 2008 |
|
29. |
Increasing trends of accuracy in Micro-engineering structures & Nano-engineering complexes with emerging advantages of Polymers and MOS devices |
K. Kamani, Rajeevan Chandel |
National Conference on Mechanism Science and Technology: from Theory to Application, NCMSTA 08 |
NIT Hamirpur |
Nov 13-14, 2008 |
|
30. |
Classification of Power Quality Problems Using Wavelet Based Artificial Neural Network |
Ashwani Kumar Chandel, Gaurav Guleria, Rajeevan Chandel |
IEEE INTERNATIONAL CONFERENCE on Power System |
Chicago USA |
21-24 April, 2008.
|
|
31. |
Face Recognition by Gabor Wavelet |
Manabesh, Pradeep, Uttpal, Rajeevan Chandel |
INTERNATIONAL Conference on Cognition & Recognition ICCR08 |
PES College of Engineering, Mandiya, Karnataka, |
10-12 April 2008. |
|
32. |
Low Power Techniques in CMOS |
Veeresh, Surya Naik, Rajeevan Chandel |
National Symposium, Kurukshtra University |
Kurukshtra University |
7 March 2008 |
|
33. |
Applications of smart materials and devices-An Overview |
I.K. Bhat, Ashwani Chandel, Rajeevan Chandel, OP Rahi |
National Conference on Recent Advances in Innovative Materials, RAIM-2008 |
NIT Hamirpur HP |
Feb 16-17, 2008 |
|
34. |
MEMS-Microactuators and Reliability Issues |
Rajeevan Chandel, Ashwani Chandel |
National Conference on Quality, Reliability & Maintainability Aspects in Engineering Systems, MED |
NIT Hamirpur HP |
Dec 27-28, 2007 |
|
35. |
Techniques for Self Improvement and Personality Development, |
Rajeevan Chandel, Ashwani Chandel |
ISTE Section Annual Convention SAC-07 |
NIT Hamirpur HP |
Nov 18-19, 2007 |
|
36. |
Research Avenues in Electronics and Communication Engineering-A Case Study |
Dr. I.K. Bhat, Rajeevan Chandel, Ashwani Chandel |
ISTE Section Annual Convention SAC-07 |
NIT Hamirpur HP |
Nov 18-19, 2007. |
|
37. |
Computer Softwares and Internet for E-Learning |
Rajeevan Chandel, Ashwani Chandel |
National Conference on Recent Trends in Library & Information Science- RTLIS-07 |
NIT Hamirpur HP |
Nov 15-16, 2007 |
|
38. |
Reversible Computing for High Performance VLSI Circuits, |
Y. Nataraj, R. Santpur and Rajeevan Chandel |
National Conference on Emerging Trends in Computing & Communication ETCC-2007 |
CSE Department NIT Hamirpur HP |
27-28, July 2007. |
|
39. |
A Comparative Simulation Analysis of Current Mirrors for Analog VLSI Circuits |
A. Sharma, Rajeevan Chandel, P. Singh |
National Conference on Emerging Trends in Computing & Communication ETCC-2007 |
CSE Department NIT Hamirpur HP |
27-28, July 2007
|
|
40. |
Comparative Study of two Operand Binary Adders |
Devesh P. Singh, R. Banta, R. Karan, P. Bhatt and Rajeevan Chandel |
National Conference on Design techniques for modern electronic devices, VLSI & Communication systems (DTVC-2007) |
E&CED NIT Hamirpur HP |
May 14-15, 2007 |
|
41. |
Power Dissipation in Inductive Interconnect Repeater-Chains |
Rajeevan Chandel, S Sarkar, RP Agarwal, Ashwani Chandel |
National Conference on Design techniques for modern electronic devices, VLSI & Communication systems (DTVC-2007) |
E&CED NIT Hamirpur HP |
May 14-15, 2007 |
|
42. |
Comparison of Static and Dynamic CMOS Logic Circuits |
Y. Nataraj and Rajeevan Chandel |
National Conference on Design techniques for modern electronic devices, VLSI & Communication systems (DTVC-2007) |
E&CED NIT Hamirpur HP |
May 14-15, 2007 |
|
43. |
Real Time Estimation of Harmonics Using Extended Kalman Filtering |
Ashwani Kumar Chandel and Rajeevan Chandel |
National Conference on Design techniques for modern electronic devices, VLSI & Communication systems (DTVC-2007) |
E&CED NIT Hamirpur HP |
May 14-15, 2007 |
|
44. |
Improvement in Optimum Number of Repeaters in Resistive Verses Inductive Interconnects with Voltage-Scaling |
Rajeevan Chandel, Ashwani Kumar Chandel & Gargi Khanna |
INTERNATIONAL CONFERENCE on Advances in Electronics & Communication Technology, ICAECT-06 |
KCCEIT Nawashahr |
Dec.15-16, 2006 |
|
45. |
A Comparative Analysis of Repeater Loaded Resistive and Inductive VLSI Interconnects |
Rajeevan Chandel, S. Sarkar and R.P. Agarwal |
Proc. National Conf. on Modern Trends in Information & Communication Technology NCMTICT-2005 |
MMEC, Mullana Haryana, India |
Oct. 20-22, 2005 |
|
46. |
Mitigation of power and delay in VLSI interconnects |
Rajeevan Chandel, S. Sarkar and R.P. Agarwal |
Proc. of IEEE CANADIAN CONFERENCE on Electrical & Computer Engineering, CCECE 2005 |
Saskatoon, Canada |
May 2-4, 2005 |
|
47. |
Power Level Adjustment Based Low Congestion MAC for Ad hoc Networks
|
Samarth Sexena, Meenakshi Sood, Gargi Khanna, Surender Soni,
|
IEEE International conference on Advance computing at Thaper University |
Patiala |
6-7 march 2009. |
|
48. |
Comparision of low power protocols for Ad hoc networks & WSNs |
Samarth Saxena, Narottam Chand, Surender Soni and Gargi Khanna |
National |
NIT Hamirpur |
Dec 30-31,2008 |
|
49. |
An Optimised CMOS Dynamic Comparator with Improved Accuracy for high performance ADCs
|
Neerav Menon, Ashwani Kumar, Surender soni |
International Conference sponsored by IEEE-in Guru Nanak Engineering College
|
Hyderabad |
11-13th June, 2010. |
|
50. |
Real Time Thermal Analysis of Biomaterials |
Ashok Kumar, Narottam Chand |
International Conference on Trends in Industrial Measurement and Automation-TIMA-2001 |
Department of Instrumentation Lab, MIT Campus, Anna University, Chennai-India |
16th to 18th Aug.2001 |
|
51. |
Thermal Properties of Biomaterials and Dynamic Response of Thermistor Probe: A Computer Based Measurement Technique |
Ashok Kumar, Ravinder Singh Zadu |
International Conference on computer Applications in Electrical Engineering CERA-01 |
Department of Electrical Engineering, University of Roorkee-India |
February21-23, 2002 |
|
52. |
Analysis of Two Ray Path Loss Model for UWB Communication |
Vinay Kumar, Ashok Kumar, Surender Soni |
proceeding of International Conference BEATS 2010 |
NIT Jalandhar |
17-19 December 2010, |
|
53. |
Performance Analysis of Wireless Sensor Localization using Fuzzy Techniques for Anchor Nodes Density |
Vinay Kumar, Ashok Kumar, Surender Soni and Mahesh Kr. Kajla |
in review process of International Conference ICACC |
NIT Hamirpur |
|
|
54. |
Range Free Localization for Wireless Sensor Networks |
Ashok Kumar, Vinay Kumar and Vinod Kapoor |
WSEAS International Conference on Software Engineering, Parallel and Distributed Systems (SEPADS11) |
University of Cambridge UK |
Feb.20-22 ,2011 |
|
55. |
PC based Thermistor Instrumentation: A simultaneous measurement technique for dynamic response of thermistor probe in conductive media and thermal properties of Biomaterials |
Ashok Kumar, Ravinder Singh Zandu |
CODEC-2001, National Conference on computer & devices of communication |
REC Jalandhar |
Feb.2001 |
|
56. |
Reconfigurable Computing in Mobile Environment |
Ashok Kumar, Narottam Chand, Vinod Kapoor |
National Conference on Design Techniques for Modern Electronic Devices, VLSI and Communication Systems, DTVC-2007 |
Electronics and Communication Engineering Department NIT Hamirpur HP |
May 2007 |
|
57. |
Wieless Sensor Radio Communication: A Comparative Study of Bluetooth, Zigbee and Ultra Wide Band |
Ashok Kumar, Narottam Chand, Vinod Kapoor |
National Conference on Emerging Trends in Computing and Communication (ETCC-2007) |
NIT Hamirpur (HP) |
July,26-27,2007 |
|
58. |
Low Power High Throughput Current Mode Signaling Technique For Global VLSI Interconnect |
Sunil Jadav, Ashok Kumar, and Gargi Khanna |
IEEE proceeding of ICCCT 10 |
NIT Allahabad |
Sept, 2010 |
|
59. |
Analysis of Current mode Drivers for VLSI Interconnect System |
Sunil Jadav, Gargi Khanna, and Ashok Kumar |
14th IEEE/VSI VLSI Design and Test Symposium |
VLSI Society of India |
July 7-9, 2010 |
|
60. |
Graphene-Promising Candidate of Nanoelectronics |
Manoj Kumar, Sunil jadav, Gaurav Saini , Gargi Khanna, Ashok Kumar |
National Conference on Recent Advances in Electrical & Electronics Engineering , RAEEE-09 |
Department of Electrical Engineering National Institute of Technology Hamirpur |
December 23-24 ,2009 |
|
61. |
Low Power Ultra Wideband Amplifier for Wireless Application |
Sunil jadav, Gargi Khanna, Ashok Kumar, Manoj Kumar |
National Conference on Electronics Comm. & Instrumentation Collaboration with IETE,E-Manthan-2010 |
Department of Electronics & Comm. College of Science & Engineering, Jhansi (U.P) |
April 02-03 ,2010 |
|
62. |
Analysis of Wideband Amplifier with Different Load Condition |
Sunil Jadav, Gargi Khanna, Ashok Kumar, Manoj Kumar |
National Conference on Emerging Trends in IT and Computing, ETIC-2010 |
Department of IT/MCA Gurgaon Institute of Technology & Management, Gurgaon (Haryana) |
march 27 ,2010 |
|
63. |
A Combined Mamdani-Sugeno Fuzzy Approach for Localization in Wireless Sensor Networks |
V Kumar, A Kumar, S Soni |
will be in the proceedings of ICWET 2011 |
Mumbai |
25-26 February, 2011 |
|
64. |
Effect of Anchor Node Distribution for Localization of Sensor Nodes Using Centroid Formula |
Vinay Kumar, Naveen Chandar Reddy, Ashok Kumar, Surender Soni |
proceeding of ICACEC 2011 |
Bhopal. |
14-15 January |
|
65. |
Transmitter and Receiver Heights Effect on Path Loss for UWB Communication |
Vinay Kumar, Naveen Chandar Reddy, Ashok Kumar, Surender Soni |
proceeding of ICACEC 2011 |
|
14-15 January, 2011 |
|
66. |
Introduction to LTE and its Air Interface |
K. N. C. Reddy, A. Kumar, M. V. Reddy |
National Conference NCEVENT 2011 |
|
2011 |
|
67. |
Range Free Localization for Wireless Sensor Networks |
Ashok Kumar, Vinay Kumar and Vinod Kapoor |
International Conference on Software Engineering, Parallel And Distributed Systems SEPADS 11) |
University of Cambridge UK |
2011 |
|
68. |
SC-FDMA uplink transmission scheme for LTE |
Naveen Chandar Reddy, Ashok Kumar, Mani Shekar Gupta |
International Conference ICACC |
NIT Hamirpur |
2011 |
|
69. |
Channel Estimation using SIT sequence for LTE Air Interface |
Naveen Chandar Reddy, Vinay Kumar, Ashok Kumar |
International Conference ICACC |
NIT Hamirpur |
2011 |
|
70. |
Impact of Skew and Jitter on the Performance of VLSI Interconnects |
Gargi Khanna, Rajeevan Chandel & Ashwani Kumar |
IEEE Asia Pacific Conference on Circuits and Systems (APCCAS-2010) |
Kuala lumpur, Malaysia |
6 -9 Dec. 2010 |
|
71. |
Impact of Width Variation of |
Diwakar Singh, Gargi Khanna, Rajeevan Chandel |
International conference on Electronics, Information & Comm. System Engg. |
MBM Engg. College Jodhpur |
28-30 March 2011 |
|
72. |
A new loadless high performance 6T SRAM cell for CMOS technologies |
Ashima Rani Rangbulla & Gargi Khanna |
International conference on Emerging trends in signal processing and VLSI design |
Guru Nanak Engg. College Hyderabad |
11-13 June,2010 |
|
73. |
Cross-talk Mitigation in Coupled VLSI Interconnects |
G. Khanna, Preeti, R. Chandel, S. Sarkar |
IEEE Symposium on VLSI Design and Test, VDAT-08 |
Bangalore |
23-26 July 2008 |
|
74. |
Performance Improvement of VLSI Interconnects Using Wave-pipelining |
V. Sulochana, Gargi Khanna |
International Conference on Innovative Technologies (ICIT-09): Research and Development in Science, Technology and Management |
PDM College of Engineering, Bahadurgarh |
June18, 19 2009 |
|
75. |
Microstrip Antenna Design Using Artificial Neural Networks |
Meenakshi Sood, Gargi Khanna |
International Conference on Innovative Technologies (ICIT-09): Research and Development in Science, Technology and Management |
PDM College of Engineering, Bahadurgarh |
June 18, 19 2009 |
|
76. |
Power level adjustment based low congestion MAC for Ad Hoc Networks |
Samarth Saxena, Meenakshi Sood, Gargi Khanna, and Surender Soni |
IEEE International Advance Computing Conference (IACC 09) |
Thapar University |
March 6th -7th ,2009 |
|
77. |
Design of Enhanced Transient Self Back Biasing for Low-Voltage High Speed CMOS Digital Circuits |
Gargi Khanna, Rajeevan Chandel & Ashwani Kumar |
International conference on Advances in Communication systems ICACS-2007 |
Govt. college of Technology Coimbatore |
10-12 January 2007 |
|
78. |
Human Exposure To Radiation From Cellular Phones |
Gargi Khanna, Meenakshi Sood |
International conference on Advances in Electronics & Communication technology |
KC College of Engineering and Information Technology, Nawanshahr |
15-16 Dec.2006 |
|
79. |
Impact of transistor width on stability of 6T SRAM cell |
Ashima Rani Rangbulla & Gargi Khanna |
National conference on Electronics Communication & Instrumention, e-Manthan 2010 |
College of Science & Engineering Ambabai, Jhansi |
2nd -3rd April, 2010 |
|
80. |
Performance Comparison of various SRAM cell for various technologies |
Ashima Rani Rangbulla & Gargi Khanna |
National conference in Electrical & Electronics Engineering |
NIT Hamirpur |
23-24 Dec.,2009 |
|
81. |
Effect of inductance in VLSI interconnects for nanometer Regime |
V. Sulochana , Gargi Khanna, P.Verma, C.Venkataiah |
National Conference on Recent advances in Condensed Matter Physics |
NIT Hamirpur |
May 23rd -24th, 2009 |
|
82. |
Design Optimization of global VLSI Interconnects by Wavepipling |
Sulochana, Gargi Khanna |
National Conference on Technological Advances and Computational Techniques |
NIT Hamirpur |
March 16th-17th ,2009 |
|
83. |
Application of Artificial neural networks in microstrip antenna design |
Meenakshi Sood, Gargi Khanna |
National Conference on Technological Advances and Computational Techniques in Electrical Engg. |
NIT Hamirpur |
March 16th-17th ,2009 |
|
84. |
Innovative Challenges and Techniques to Mitigate Leakage Power in Nano Scale VLSI Design |
Gaurav Saini, Gargi Khanna |
National Conference on Emerging trends in Computing and Communication ETCC08 |
NIT Hamirpur |
Dec 30-31,2008 |
|
85. |
Comparison of low power protocols for Ad hoc networks & WSNs |
Samarth Saxena, Narottam Chand, Surender Soni and Gargi Khanna |
National Conference on Emerging trends in Computing and Communication ETCC08 |
NIT Hamirpur |
Dec 30-31,2008 |
|
86. |
Attaining negative permeability and permittivity through composite materials |
Meenakshi Sood and Gargi Khanna |
Proceedings of NCMSTA 08 Conference, |
NIT Hamirpur |
13-14 Nov,2008 |
|
87. |
Impact of Cellular Communication |
Meenakshi Sood and Gargi Khanna |
NCETET -08 |
D C R UST Murthal |
May 26-27, 2008 |
|
88. |
Solution to Copper Interconnect Problems: Carbon Nanotubes |
Gargi Khanna, Rajeevan Chandel & Ashwani Kumar |
National Conference on Recent advances in Innovative Materials |
NIT Hamirpur |
Feb.16-17,2008 |
|
89. |
Metamaterials: Periodic Structure Redefining Permeability and Permittivity |
Meenakshi Sood, Gargi Khanna |
National Conference on Recent advances in Innovative Materials |
NIT Hamirpur |
Feb.16-17,2008 |
|
90. |
Non-Ideal Effects and VLSI Global Interconnect Reliability |
Gargi Khanna, Rajeevan Chandel & Ashwani Kumar |
National Conference on Quality, reliability & maintainability Aspects in Engg. Systems |
NIT Hamirpur |
Dec. 27th -28th, 2007 |
|
91. |
Reliability of the Mobile Phone Usability |
Meenakshi Sood and Gargi Khanna |
National Conference on Quality, Reliability & maintainability Aspects in Engg. Systems |
NIT Hamirpur |
Dec. 27th -28th, 2007 |
|
92. |
A Comparative Study of CMOS Buffer for High Speed Digital Circuits |
Gargi Khanna, Rajeevan Chandel & Ashwani Kumar |
National Conference on Emerging Trends in Computing and Communication (ETCC-2007) |
NIT Hamirpur |
27-28 July, 2007 |
|
93. |
Throughput Enhancement using wavepiplined global interconnects |
Gargi Khanna, Rajeevan Chandel & Ashwani Kumar |
National Conference on Design Techniques for modern devices, VLSI & Comm. Systems (DTVC-2007) |
NIT Hamirpur |
May 2007 |
|
94. |
Influence of Voltage Scaled Repeaters on VLSI Interconnect Delay
|
Gargi Khanna, Rajeevan Chandel & Ashwani Kumar |
National Conference on Recent Advances in Electronics and Communication Technology (RAECT-06) |
GNDEC Ludhiana |
9-10 Nov., 2006 |
|
95. |
Health Hazards: The Other Face of Mobile Communication |
Gargi Khanna and Meenakshi Sood |
National Conference on Technology For Disaster Mitigation. |
NIT Hamirpur |
29-30 Sept., 06 |
|
96. |
Unified Compact Modelling of a gate Tunneling Current considering Image Force Induced Barrier Lowering for a nanoscale N-MOSFET |
Ashwani Kumar, S.Dasgupta |
International Conference on Recent Trends in Nanoscience and Technology (ICRTNT) |
Jadavpur university, Calcutta |
dec-7-9, 2006 |
|
97. |
Effect of Inductance on Wire Sizing the Global Interconnect in VLSI Circuits |
Ashwani Kumar, Surender Soni and Ashok Kumar |
11th IEEE VLSI Design and Test Symposium (VDAT-07), |
Saha Institute of Nuclear Physics Convention Centre, Salt Lake Kolkatta |
August 8-11,2007 |
|
98. |
Recent Advances in High Resolution Lithography for VLSI Application |
Ashwani Kumar, Gaurav Saini, S. Javad, M. Kumar, Vinod Kapoor and Narottam Chand |
National Conference ETCC-2008 |
NIT Hamirpur |
2008 |
|
99. |
Leakage behaviour of underlap FINFET structure: A simulation study |
Gaurav Saini and Ashwani K. Rana |
Int. Conf.on computer & communiocation (ICCCT-10) |
MNIT Allahabad, |
Dec,2010 |
|
100. |
New Low power technique: Leakage feedback with stack and sleepy stack with keeper. |
Pankaj K. Pal and Ashwani K. Rana |
Int. Conf.on computer & communiocation (ICCCT-10) |
|
|
|
101. |
Next Generation (4G) Mobile Networks- Goals Towards MAGIC |
Krishan Kumar |
Emerging trends in Engg. & Technology-08. |
Deenbandhu chootu Ram University of Science & Techonology, Murthal (Sonipat) |
25th-26th May 2008 |
|
102. |
Adaptive-step Reverse Link closed loop power control CDMA System |
Krishan Kumar, Arvind Kumar |
IEEE International Conference on computer and Communication Technology 2010. |
MNIT Allahabad |
17-19 Sep 2010 |
|
103. |
FemtoCell and Security Related Issues |
Sankit R Kassa, Krishan Kumar |
International Conference on Signals, Systems & Automation (ICSSA-11) |
G H Patel College of Engg & Technology, Gujarat |
24-25 Jan 2011 |
|
104. |
Source Follower Based Track-and-Hold Circuit for High Speed Wireless Communication |
Manoj Kumar and Gagnesh Kumar |
Published in ETIC-2010 march 27 ,2010 National Conference on Emerging Trends in IT and Computing, pp. 26-29
|
Gurgaon Institute of Technology & Management, Gurgaon (Haryana), |
2010 |
|
105. |
Performance comparison of various Adiabatic logic circuits |
Atul Maurya & Gagnesh kumar |
International Conference on Advances in Computing and Communication (April 08-10, 2011) |
NIT Hamirpur |
2011 |
|
106. |
Asymmetrical Positive feedback adiabatic logic circuits |
Atul Maurya & Gagnesh kumar |
International conference(Under Review) |
M. B. M. Engineering College, Faculty of Engineering, |
2011 |
|
107. |
Adiabatic logic circuits with two phase clocked scheme |
|